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  •  RÉSUMÉ

    My RÉSUMÉ in pdf format.

    S. Behdad Hosseini

    CAD Laboratory, ECE Department  

    Faculty of Engineering, University of Tehran

    Tehran 14399-515, Iran

    Email: behdadhATcad.ut.ac.ir

    Web: www.behdadh.net

    Office: +98-21-61114308

    Mobile : +98-912-2710638

    Objective

    To acquire a fellowship for graduate study in Computer Engineering.

    Research Interests

    • Computer Hardware, including:
      • Design for Testability and High Level Digital Testing
      • Computer Architecture and High Performance Computing
      • Fault Tolerant Systems

    • Artificial Intelligence, including:
      • Artificial Neural Networks
      • Bio-inspired Paradigms and Algorithms

    Education

    • M.Sc. in Computer Architecture                            Sep. 2007 – March 2010 [Expected]
      University of Tehran, Tehran , Iran .                    GPA: 3.49/4.0 - 17.44/20 [Current]
      Thesis Title: Testability of Artificial Neural Networks Utilizing High Level Fault Models.
      Advisor: Prof. Zainalabedin Navabi
      Extra courses passed:
      • Fuzzy Logic
      • Advanced Instrumentation
      • Data Fusion

    • B.Sc. in Computer Hardware Engineering           Sep. 1999 – Sep. 2002
      University of Isfahan
      , Isfahan , Iran .                   GPA: 3.16/4.0 – 15.78/20
      Thesis Title: Design and Implementing a 1-to-4 PBX System Using a Microcontroller.
      Computer science and graduate courses passed:
      • Algorithm Design
      • Compiler Design Principles
      • Advanced Computer Networks
      • Digital Processing of Speech Signals

    Honors

    • Rank 37 among 8000 competitors in national university entrance exam for graduate studies in computer field, summer 2007.
    • 1st student succeeded in attaining B.Sc. degree in 3 years at University of Isfahan.
    • 9th team rank, ACM/ICPC Regional Contest, West Asia Region, fall 2003.
    • 10th team rank, ACM/ICPC Regional Contest, West Asia Region, fall 2002.
    • Rank 1300 among 400000 competitors in national university entrance exam for undergraduate studies, summer 1999.

    Teaching Experiences

    Professional Experiences

    • May 2006 – Aug. 2007
      Head of Linux Programming Team, ICTI, Isfahan University of Technology
      Activities:
      • Designer and Developer of Windows and Linux SMP-aware device drivers for a high resolution and high frequency analog to digital PCI interface card.
      • Designer and Developer of Linux Socket-Level Network Infrastructure for distributing high frequency data among consumers.
      • Coordinator of Research Group on i386 and x86-64 SIMD instructions to be used in high frequency Linux DSP algorithms.

     

    • Jan. 2001 – May 2001
      Dynamic Web Designer, Vice Chancellor For Research Affairs, University of Isfahan
      Project Title: Design and Implementing a Platform-Independent Web-Based Database Using CGI Technology.

    Technical Skills

    • Hardware Description Languages
      Proficient in VHDL and Verilog.
      Fluent in SystemC.
    • Programming Languages
      Proficient in Pascal, C, C++, Java, 80x86 Assembly, MCS51 Assembly and Z80 Assembly.
      Fluent in Perl and 8085 Assembly.
      Familiar with Prolog and SPARC Assembly.
    • CAD & Tools
      Proficient in MathWorks Matlab, Altera Quartus II and Mentor Graphics ModelSim.
      Fluent in OrCad Capture and Mentor Graphics LeonardoSpectrum.
    • Web Development
      Proficient in HTML, CGI Programming and PHP.
      Familiar with Jscript, XML and XHTML.
    • Database Systems & Network Management
      Proficient in MySQL and LAN Administration in Windows and Linux.
      Fluent in Microsoft Access and Borland Interbase.

    Publications

          [1] Ali Shahabi, S. Behdad Hosseini, Hassan Sohofi, and Zainalabedin Navabi, “A Partitioning Approach to Improve Reconfigurable Neuron-inspired Online BIST,” Accepted in 16th IEEE International On-Line Testing Symposium (IOLTS’10). [pdf]

          [2] S. Behdad Hosseini, Ali Shahabi, Hassan Sohofi, and Zainalabedin Navabi, “A Reconfigurable Online BIST for Combinational Hardware Using Digital Neural Networks,” Accepted in 15th IEEE European Test Symposium (ETS’10), May 2010. [pdf]

          [3] Najmeh Farajipour, S. Behdad Hosseini, and Zainalabedin Navabi, “Utilizing HDL Simulation Engines for Accelerating Design and Test Processes,” 6th IEEE East-West Design and Test International Symposium (EWDTS’08), Oct. 2008, pp. 371-374. [pdf]

    Languages

    • Persian Native
    • English
      • TOEFL iBT (8 Aug. 2009): Total: 96/120, Reading: 28/30, Listening: 24/30, Speaking: 22/30, Writing: 22/30
      • TOEFL iBT (4 Dec. 2009): Total: 103/120, Reading: 29/30, Listening: 30/30, Speaking: 19/30, Writing: 25/30
      • GRE PBT (24 Oct. 2009): Verbal: 420/800 (40%), Quantitative: 690/800 (69%), Writing 2.5/6.0 (3%)
    • French Familiar
  
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Last Update: February 27, 2010